Numerical controls (NC) are used primarily for controlling machine tools, and may be subdivided essentially into two functional units, a main computer and at least one controller unit.
The main computer makes available the user interfaces such as keyboard and monitor necessary for operating the NC, and is used for creating, storing and processing programs. Located in the controller units are control loops which are used for driving converter modules, that in turn drive motors. The controller units also include digital and/or analog interfaces for acquiring actual values needed continuously during a program execution for controlling the control loops. The actual values to be acquired may be, for example, position values, speed values, acceleration values or also current values. The controller units are also microprocessor-controlled.
During the processing of a program, at regular time intervals that are a function of the processing clock pulse of the main computer, the main computer sends to the controller units setpoint values as input for the control loops. These setpoint values are generated in a setpoint-value generator by subdividing the path between a starting point and the terminal point of a traversing movement. In this connection, one also speaks of composition or block-by-block processing. Concurrently with the arrival of setpoint values, the controller units—at regular time intervals that are a function of the processing clock pulse of the controller units—record actual values for the control loops. As a rule, a plurality of actual values is recorded between the arrival of two setpoint values.
There may be a desire to spatially separate the main computer and the controller units. Thus, it may desirable be provided to combine the main computer together with the keyboard and the monitor in one housing, in order to create a user interface able to be optimally placed for the user from the standpoint of ergonomics. In the same manner, it may be desirable to arrange the controller units close to the converters, to ensure optimal signal quality of the pulse-width-modulated control signals.
Serial interfaces present themselves for the data transmission between spatially separated units, since in this case, cables having only a few conductors may be used, which may be very inexpensive and may be easy to manipulate compared to cables for data transmission via parallel interfaces. In the event that a plurality of controller units are to be operated at one main computer, it may be provided to connect the controller units to the main computer in the form of a series circuit, in which the data transmission is realized by serial point-to-point connections. In one such architecture, the main computer transmits information in the form of a serial data stream to the first controller unit of the series circuit, which relays the information to the next controller unit of the series circuit, etc., until the information arrives at the final controller unit of the series circuit.
European Published Patent Application No. 1 394 644 describes a numerical control that includes a numerical control unit and a plurality of motor control units that are interconnected via serial communication lines in the form of a series circuit. To control the motor control units, the numerical control unit transmits data, especially setpoint values, to the first motor control of the series circuit. It forwards the data to the next motor control, etc., until the data finally reaches the last motor control of the series circuit.
A numerical control of this type may provide the disadvantage that the motor controls, as well as the numerical control unit, are controlled by independent clock signals, i.e., they do not run synchronously relative to each other. Therefore, the motor controls must be synchronized with the numerical control unit at regular time intervals.
Conventional methods for synchronization may be used, e.g., in field bus systems such as PROFIBUS, or also in the Ethernet, which is conventional, e.g., in office technology. For the synchronization, the main computer (bus master) transmits synchronization information to the controller units (slaves) at cyclical time intervals. They synchronize their sequencing control with the aid of the synchronization information, i.e., they correct the phase error or shift between the reception of the setpoint values and the acquisition of actual values which has resulted since the last synchronization due to the frequency deviation of the various clock-pulse generators. The synchronization information is frequently sent in the form of data packets (also referred to as data telegrams). In this context, they may be pure synchronization packets, or data packets containing both synchronization information and user data.
In the system architecture described—series circuit of main computer and controller units—because of the main computer and the controller units being operated by different clock signals independent of one another, a further problem may result in the transmission of the synchronization information. Depending on the phase position of the clock signal of the controller unit, the reception of a data packet and therefore the arrival of the synchronization information is delayed by up to one clock-pulse period. This effect is also referred to by the technical term “jitter.”
Also, as a result of the jitter, the data packets, especially the synchronization information contained therein, are not relayed with a constant delay time to the following controller unit of the series circuit. This means that the further a controller unit is from the main computer, i.e., the more controller units the synchronization information passes through, the more unreliably the synchronization functions, because with each controller unit traversed, the maximum time deviation in the transmission of the synchronization information increases. Since the change in the phase position of the clock signals of the main computer and the controller units relative to each other follows largely from the tolerances of the clock-pulse generators and differences in the clock frequency resulting therefrom, this effect is periodic.
One possible consequence of a faulty synchronization is that a disturbance is superimposed on the actual values measured in a controller unit. This may come about by the fact that the moments of the arrival of setpoint values shift relative to the moments of the measuring of actual values in the controller units. In particular, the measured value may be falsified slightly if the arrival of a setpoint value coincides with the conversion of an analog measuring signal into a digital measured value. Since the influencing of the measured values is a function of the jitter, and this changes periodically, one also speaks of a beat effect. The result may be less precision of the machine tool controlled by the numerical control, i.e., a poorer quality, particularly of the surface finish, of parts produced by the machine tool. Since the disturbances have comparatively low frequencies, it may not be possible to filter them out in the control loops, because the control rate may thereby be reduced to the point that the controller unit may no longer be usefully operated.
One design approach for achieving reliable transmission of synchronization information even via multiple controller units is to operate the main computer and the controller units using the same clock signal.
German Published Patent Application No. 100 48 191 describes a method for synchronizing a plurality of bus systems in which synchronization signals are fed from a receiver unit of a bus system to the phase shifter of a phase-locked loop (PLL) having a clock-pulse generator. The phase shifter ascertains the instantaneous phase error and readjusts the clock-pulse generator such that the clock-pulse generator outputs a setpoint number of clock signals between two synchronization signals. The clock signal is fed as a central clock pulse to all transmitter units of the bus systems.
This method may provide the disadvantage that, given high accuracy requirements, the synchronization signals must be transmitted at short time intervals to keep the phase error of the clock pulse generator small. This may be true in particular when working with a system having the architecture described above, since in spite of the synchronization, the phase error of the controller units compared to the clock signal of the main computer increases with each module in the series circuit.